
98
AT85C51SND3Bx
7632A–MP3–03/06
Reset Value = 0000 0000b
Table 109. OTGIEN Register
OTGIEN (1.E7h) – USB OTG Interrupt Enable Register
7 6 5 4 3 2 1 0
- - STOE HNPERRE ROLEEXE BCERRE VBERRE SRPE
Bit
Number
Bit
Mnemonic
Description
7-6 -
Reserved
The value read from these bits is always 0. Do not set these bits.
5 STOE
Suspend Time-out Error Interrupt Enable Bit
Set to enable the STOI interrupt.
Clear to disable the STOI interrupt.
4 HNPERRE
HNP Error Interrupt Enable Bit
Set to enable the HNPERRI interrupt.
Clear to disable the HNPERRI interrupt.
3 ROLEEXE
Role Exchange Interrupt Enable Bit
Set to enable the ROLEEXI interrupt.
Clear to disable the ROLEEXI interrupt.
2 BCERRE
B-Connection Error Interrupt Enable Bit
Set to enable the BCERRI interrupt.
Clear to disable the BCERRI interrupt.
1 VBERRE
VBus Error Interrupt Enable Bit
Set to enable the VBERRI interrupt.
Clear to disable the VBERRI interrupt.
0 SRPE
SRP Interrupt Enable Bit
Set to enable the SRPI interrupt.
Clear to disable the SRPI interrupt.
Table 110. OTGINT Register
OTGINT (1.D1h) – USB Global Interrupt Register
7 6 5 4 3 2 1 0
- - STOI HNPERRI ROLEEXI BCERRI VBERRI SRPI
Bit
Number
Bit
Mnemonic
Description
7-6 -
Reserved
The value read from these bits is always 0. Do not set these bits.
5 STOI
Suspend Time-out Error Interrupt Flag
Set by hardware when a time-out error (more than 150 ms) has been detected
after a suspend.
Shall be cleared by software. See for more details.
4 HNPERRI
HNP Error Interrupt Flag
Set by hardware when an error has been detected during the protocol.
Shall be cleared by software. See for more details.
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