Atmel AT85DVK-07 Spezifikationen PDF herunterladen (Seite 95)

AT85C51SND3Bx

7632A–MP3–03/06

Reset Value = 0010 0000b

Reset Value = 0000 0000b

0 VBUSTE

VBUS Transition Interrupt Enable Bit

Set this bit to enable the VBUS Transition interrupt generation.

Clear this bit to disable the VBUS Transition interrupt generation.

Table 103. USBSTA Register

USBSTA (1.E2h) – USB General Status Register

7 6 5 4 3 2 1 0

- - - - - SPEED ID VBUS

Bit

Number

Bit

Mnemonic

Description

7-3 -

Reserved

The value read from these bits is always 0. Do not set these bits.

2 SPEED

Speed Status Flag

Set by hardware when the controller is in HIGH-SPEED mode.

Cleared by hardware when the controller is in FULL-SPEED mode.

1 ID

IUD Pin Flag

Set / cleared by hardware and reflects the state of the UID pin.

0 VBUS

VBus Flag

Set / cleared by hardware and reflects the level of the UVCC pin.

See Section “Plug-in detection” for more details.

Table 104. USBINT Register

USBINT (1.E3h) – USB Global Interrupt Register

7 6 5 4 3 2 1 0

- - - - - - IDTI VBUSTI

Bit

Number

Bit

Mnemonic

Description

7-2 -

Reserved

The value read from these bits is always 0. Do not set these bits.

1 IDTI

ID Transition Interrupt Flag

Set by hardware when a transition (high to low, low to high) has been detected

on the UID pin.

Shall be cleared by software.

0 VBUSTI

VBUS Transition Interrupt Flag

Set by hardware when a transition (high to low, low to high) has been detected

on the UVCC pin.

Shall be cleared by software.

Bit

Number

Bit

Mnemonic Description

1 2 ... 90 91 92 93 94 95 96 97 98 99 100 ... 262 263

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