Atmel AT85DVK-07 Spezifikationen PDF herunterladen (Seite 118)

118

AT85C51SND3Bx

7632A–MP3–03/06

Reset Value = 0000 0000b

USB Device Endpoint

Registers

Reset Value = 0000 0000b

Bit

Number

Bit

Mnemonic

Description

7-0 FNUM7:0

Frame Number Lower Flag

Set by hardware. These bits are the 8 LSB of the 11-bits Frame Number

information.

Table 118. UDMFN Register

UDMFN (1.DEh) – USB Device Frame Number Register

7 6 5 4 3 2 1 0

- - - FNCERR - - - -

Bit

Number

Bit

Mnemonic

Description

7-5 -

Reserved

The value read from these bits is always 0. Do not set these bits.

4 FNCERR

Frame Number CRC Error Flag

Set by hardware when a corrupted Frame Number in start of frame packet is

received.

This bit and the SOFI interrupt are updated at the same time.

3-0 -

Reserved

The value read from these bits is always 0. Do not set these bits.

Table 119. UENUM Register

UENUM (1.C9h) – USB Endpoint Number Selection Register

7 6 5 4 3 2 1 0

- - - - - EPNUM2 EPNUM1 EPNUM0

Bit

Number

Bit

Mnemonic

Description

7-3 -

Reserved

The value read from these bits is always 0. Do not set these bits.

2-0 EPNUM2:0

Endpoint Number Bits

Set to select the number of the endpoint which shall be accessed by the CPU.

See

Section “Endpoint Selection” for more details.

EPNUM = 111b is forbidden.

Table 120. UERST Register

UERST (1.CAh) – USB Endpoint Reset Register

7 6 5 4 3 2 1 0

- EPRST6 EPRST5 EPRST4 EPRST3 EPRST2 EPRST1 EPRST0

1 2 ... 113 114 115 116 117 118 119 120 121 122 123 ... 262 263

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