Atmel AT85DVK-07 Spezifikationen PDF herunterladen (Seite 154)

154

AT85C51SND3Bx

7632A–MP3–03/06

Audio Codec The audio codec is controlled by four registers as detailed in Figure 74:

Figure 74. Audio Codec Block Diagram

Audio Outputs

AT85C51SND3B2 &

AT85C51SND3B3

The audio output system of AT85C51SND3B2 & AT85C51SND3B3 is based on a pair of

sigma-delta D/A converter used to convert the audio data with high linearity and high

S/N. It is enabled by setting the AOEN bit in ACCON (see

Table 177).

Audio input system features are detailed in the following sections.

Anti-Pop Circuitry In order to avoid any noise when enabling the audio output system an anti-pop circuitry

has been implemented on the audio outputs (OUTR and OUTL). It consists in a dis

charge circuit controlled by AODIS bit in ACAUX (see Table 178) and a preload circuit

controlled by AOPRE bit in ACAUX. Prior to enable the audio output system, user must

take care to discharge then charge the audio outputs.

Output Sources The audio output source can come from either the audio processor or the stereo lines

Inputs sources. The selection of the source is done by setting or clearing the AOSSEL

bit in ACCON according to

Table 156.

Table 156. Audio Codec Output Source Selection

Note: 1. Stereo or mono choice is done by the audio processor depending on the audio flow

under decoding.

Output Gain Control Analog volume is controlled separately on both channel by setting the AORG4:0 bits in

ACORG for the right channel and the AOLG4:0 bits in ACOLG for the left channel.

Table 157 shows the gain value versus the programmed AORG or AOLG value.

AMBVS

ACCON.6

AIPG2:0

ACIPG.2:0

AMBEN

ACCON.5

AORG4:0

ACORG.4:0

OUTR

OUTL

LINR

LINL

MICIN

MICBIAS

To Audio

From Audio

AILPG

ACIPG.3

AOLG4:0

ACOLG.4:0

AOSSEL

ACCON.1

AISSEL

ACCON.4

AODRV

ACCON.2

Processor

Bias

Generator

AT85C51SND3B2 &

AOSSEL Selection

0 Line Input (stereo)

1 Audio Processor (mono or stereo)

(1)

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