Atmel AT85DVK-07 Spezifikationen PDF herunterladen (Seite 240)

240

AT85C51SND3Bx

7632A–MP3–03/06

Registers Table 260. KBCON Register

KBCON (0.A3h) – Keyboard Control Register

Reset Value = 0000 1111b

Table 261. KBSTA Register

KBSTA (0.A4h) – Keyboard Control and Status Register

Reset Value = 0010 0000b

7 6 5 4 3 2 1 0

KINL3 KINL2 KINL1 KINL0 KINM3 KINM2 KINM1 KINM0

Bit

Number

Bit

Mnemonic

Description

7-4 KINL3:0

Keyboard Input Level Bit

Set to enable a high level detection on the respective KIN3:0 input.

Clear to enable a low level detection on the respective KIN3:0 input.

3-0 KINM3:0

Keyboard Input Mask Bit

Set to prevent the respective KINF3:0 flag from generating a keyboard interrupt.

Clear to allow the respective KINF3:0 flag to generate a keyboard interrupt.

7 6 5 4 3 2 1 0

KPDE KDCPE KDCPL - KINF3 KINF2 KINF1 KINF0

Bit

Number

Bit

Mnemonic

Description

7 KPDE

Keyboard Power Down Enable Bit

Set to enable exit of power down mode by the keyboard interrupt.

Clear to disable exit of power down mode by the keyboard interrupt.

6 KDCPE

Keyboard DCPWR Pin Enable

Set to connect DCPWR pin on KIN0 input.

Clear to isolate DCPWR pin from KIN0 input.

5 KDCPL

Keyboard DCPWR Pin Line

Set by hardware and represent the level on DCPWR input.

4 -

Reserved

The value read from this bit is always 0. Do not set this bit.

3-0 KINF3:0

Keyboard Input Interrupt Flag

Set by hardware when the respective KIN3:0 input detects a programmed level.

Cleared when reading KBSTA.

1 2 ... 235 236 237 238 239 240 241 242 243 244 245 ... 262 263

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