Atmel CAMELIA 8M Bedienungsanleitung PDF herunterladen (Seite 6)

CAMELIA 8M Digital Camera

1986B–IMAGE–03/03

Operation with "Integration

Time Control"

Integration is fully controlled by the user from the external signal ITC:

• The falling edge of ITC activates the start of the frame integration. This falling edge

is synchronized by the camera with a latency of Td (Time delay equivalent to a

readout Time for a Line: See notes above).

• The rising edge of ITC activates the stop of the frame integration. This rising edge is

synchronized by the camera with the same latency of Td.

• Note: ITC signal period must be greater than integration time (defined by ITC low)

plus frame readout time.

• “Video Lines” (before and after valid frame) are 4+4 for Binning 1x1 (and also 1+1

for Binning 4x4).

Figure 5. "Integration Time Control" Timing Diagram

Line Timing Duty cycle of the PCK is 50%.

Rising and falling edges: 1.5 ns.

Data rate is (Internal pixel clock): 25 MHz in binning mode 1x1.

Figure 6. Line Timing Diagram

LEN

ITC

Frame

integration

Time set by RS232 Video lines

Line 1

Line 2

Line N-1

Line N

Video lines

M Pixels

Shutter

delay

WaitingFrame readout

FEN

SHUTTER

LEN

PCK

DATAs

1st Valid Pixel Last Valid Pixel

1 2 3 4 5 6 7 8 9 10 11 ... 20 21

Keine Kommentare

Atmel CAMELIA 8M Bedienungsanleitung Seite 6