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CAMELIA 8M Digital Camera
1986B–IMAGE–03/03
Timing 2x2 and 4x4 pixel binning are possible to enable previewing modes. Preview mode is
only available in Black and white otherwise the user has to use Overlay mode (but nei-
ther correction nor software LUT are applicable on displayed images).
Frame Timing Three timing modes are available: Continuous, external triggered and Integration Time
controlled (ITC).
The signals described in the following drawings are:
Notes: 1. Pixel is defined as valid (part of the Frame) when both LEN and FEN Signals are at
Low Level.
2. The latency (called Td after) of 1 Readout line Time defined below depends on the
binning mode. For no binning, this latency is around 104 µs.
3. Minimum Time at high level of LEN Signal is 10 µs (Transfer Time between two lines).
4. Minimum Time at high level of FEN Signal is 4 lines readout Time (around 416 µs).
5. Shutter Delay is adjustable via Commcam or RS232 commands (1, 5, 10 or 20 ms).
Table 2. Timing Mode
Mode Frame Readout Time Line Readout Time
No binning 370 ms 104 µs
2x2 pixel binning 200 ms 114 µs
4x4 pixel binning 110 ms 134 µs
Table 3. Frame Timing
Signal Name Description
Cam.
In/Out
Pins
Connection
LEN Line ENable Low state active when pixel is part
of line
Out 26/27
FEN Frame
ENable
Low state active when lines are
part of frame
Out 3/4
SHUTTER SHUTTER
Sync
External shutter Trig output Sig.
(high level active)
Out 21/22
TRIG TRIGger External Trigger Input Signal
(Rising Edge)
In 46/47
ITC Integration
Time Control
External ITC Input Signal
(Falling/Rising Edges)
In 46/47
PCK Pixel Clock Internal Master Data Clock Signal
at 25 MHz
Out 1/2
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