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The 8051 Instruction Set

Atmel 8051 Microcontrollers Hardware Manual 1-12

4316E–8051–01/07

1.9 Jump

Instructions

Table 1-11 shows the list of unconditional jumps.

The table lists a single “JMP addr” instruction, but in fact there are three -SJMP, LJMP,

AJMP -which differ in the format of the destination address. JMP is a generic mnemonic

which can be used if the programmer does not care how the jump is encoded.

The SJMP instruction encodes the destination address as relative offset, as described

above. The instruction is 2 bytes long, consisting of the opcode and the relative offset

byte. The jump distance is limited to range of -128 to + 127 bytes relative to the instruc-

tion following the SJMP.

The LJMP instruction encodes the destination address as a 16-bit constant. The instruc-

tion is 3 bytes long, consisting of the opcode and two address bytes. The destination

address can be anywhere in the 64K Program Memory space.

The AJMP instruction encodes the destination address as an 11-bit constant. The

instruction is 2 bytes long, consisting of the opcode, which itself contains 3 of the 11

address bits, followed by another byte containing the low 8 bits of the destination

address. When the instruction is executed, these 11 bits are simply substituted for the

low 11 bits in the PC. The high 5 bits stay the same. Hence the destination has to be

within the same 2K block as the instruction following the AJMP.

In all cases the programmer specifies the destination address to the assembler in the

same way: as a label or as a 16-bit constant. The assembler will put the destination

address into the correct format for the given instruction. If the format required by the

instruction will not support the distance to the specified destination address, a “Destina-

tion out of range” message is written, into the list file.

The JMP @ A + DPTR instruction supports case jumps. The destination address is

computed at execution time as the sum of the 16-bit DPTR register and the Accumula-

tor. Typically, DPTR is set up with the address of a jump table, and the Accumulator is

given an index to the table. In a 5-way branch, for example, an integer 0 through 4 is

loaded into the Accumulator.

The code to be executed might be as follows:

MOV DPTR, # JUMP_TABLE

MOV A, INDEX_NUMBER

RL A

JMP @ A + DPTR

addr 11 11-bit destination address. Used by ACALL and AJMP. The branch will be within the same 2K byte page of

program memory as the first byte of the following instruction.

rel Signed (two’s complement) 8-bit offset byte. Used by SJMP and all conditional jumps. Range is -128 to +127

bytes relative to first byte of the following instruction.

bit Direct Addressed bit in Internal Data RAM or Special Function Register.

Table 1-10. Addressing Modes

Table 1-11. Unconditional Jumps in Atmel 8051

Mnemonic Operation Execution Time @ 12MHz (µs)

JMP addr

JMP @A + DPTR

CALL addr

RET

RETI

NOP

Jump to addr

Jump to A + DPTR

Call subroutine at addr

Return from subroutine

Return from interrupt

No operation

1 2 ... 9 10 11 12 13 14 15 16 17 18 19 ... 115 116

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